SiFive announces 4th generation of Essential RISC-V chips



SiFive considers itself the gold standard for RISC-V computing and it is unveiling the fourth generation of its SiFive Essential product family.

Revealed at the RISC-V Summit Europe 2024, the SiFive Essential Gen4 products are available today. . Developed over a decade, the field-proven Essential IP is already in use in billions of products including mobile phones, sensors, SSDs, FPGA platforms, surveillance cameras, smart watches and more. SiFive and the RISC-V family of open-standard chips have been gaining on market leader Arm.

This full-portfolio refresh brings higher performance, improved power efficiency and more flexible interfaces, with configuration and integration options to cover virtually any possibility. The SiFive Essential Gen4 products are based on the RISC-V open architecture for chip designs.

“The best RISC-V embedded solutions just got much better with this fourth generation,” said John Ronco, SiFive SVP of product in a statement. “With the benefit of cost-effective flexibility, performance and low power, RISC-V has won the battle for embedded. As legacy ISAs have reduced R&D and support, we are expanding SiFive’s broad portfolio of market leading Essential products and reaffirming our commitment and support for customers in these critical areas of innovation.”


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SiFive has 350 design wins and two billion chips based on its designs sold.

SiFive has seen strong momentum across embedded segments where the Essential Gen4 products will bring impressive flexibility and features to enable customers to better tailor their designs. More than two billion SiFive RISC-V based chips for embedded devices have shipped to date and the market continues to grow rapidly.

“The embedded space in 2024 represents a huge ($257 billion) market opportunity, growing with an 8.3% CAGR through 2030. RISC-V and SiFive have been increasingly gaining momentum and taking share from the other ISAs. SiFive is launching the products that these customers need while also innovating at the high performance and advanced AI levels,” said Rich Wawrzyniak, principal analyst at The SHD Group, in a statement. “It is a mistake to discount the importance of embedded products as the flexibility and software portability of RISC-V makes designing products with multiple cores—including the highest performance cores—easier, creating a clear pathway for RISC-V into the next generations of high-performance chips.”

The Essential Gen4 IP portfolio features the broadest RISC-V CPU and system IP portfolio, up tp 40% runtime power reduction, eight different baseline embedded 32-bit and 64-bit cores, and more.

It has variations from 2 stage single-issue to 8 stage superscalar, improved L2 cache and enhanced L1 memory, extensive configuration and integration options, and a variety of options for CPU type, on-chip memories and system, peripheral and front ports. It has advanced power management and security, debug and trace, and leading software support, including embedded Linux, FreeRTOS, Eclipse C/C++/ IDE
Essential Gen4 portfolio.



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